Type of Document	Thesis
Author	Lewandowski, Mark
Author's Email Address	lewandow@cs.fsu.edu
URN	etd-01072006-003259
Title	Latency Reduction Techniques for Remote Memory Access in ANEMONE
Degree	Master of Science
Department	Computer Science, Department of
Advisory Committee	Advisor Name Title Kartik Gopalan Committee Chair Sudhir Aggarwal Committee Member Ted Baker Committee Member
Keywords	Cache Rmap Psuedo Block Device Anemone
Date of Defense	2005-12-12
Availability	unrestricted
Abstract Memory system hierarchy has remained unchanged for many years, leading to a growing gap between main memory access times and a local disk's paging latencies. This trend has especially become a performance bottleneck for memory intensive applications. These applications can quickly eat up all available main memory, forcing the kernel to start swapping to the disk. One solution to this problem is to insert a new level -- the remote memory -- in the traditional memory hierarchy between local main memory and local disk. Earlier work on the Adaptive NEtwork MemOry engiNE (ANEMONE) system demonstrated that remote memory access is a viable and attractive solution to this problem when the paging process exhibits a random block access pattern. This thesis evaluates the network communication latency of the Anemone system using three mechanisms: 1) a kernel-level lightweight reliable datagram protocol to replace NFS, 2) an aggressive page acknowledgment policy, and 3) a two-level caching mechanism. Collectively, these three techniques reduce the average network paging latency from 800 microseconds to 500 microseconds and speed up the average application execution time by a factor of 3 to 9.
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