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Title page for ETD etd-07062011-165129


Type of Document Dissertation
Author Guo, Rui
Author's Email Address rg07g@fsu.edu
URN etd-07062011-165129
Title Efficient Hardware Implementation Techniques For Digital Filters
Degree Doctor of Philosophy
Department Electrical and Computer Engineering, Department of
Advisory Committee
Advisor Name Title
Linda DeBrunner Committee Chair
Bruce Harvey Committee Member
Rodney Roberts Committee Member
Victor DeBrunner Committee Member
Gary Tyson University Representative
Keywords
  • Pipelining
  • Distributed Arithmetic
  • Digital Filter
Date of Defense 2011-06-29
Availability unrestricted
Abstract
This dissertation addresses the development of efficient digital filter implementation techniques. Measures for area, latency, and throughput are used to quantify the benefits of the proposed implementation schemes, as well as consideration of the digital signal processing algorithm performance.

Multiple-constant multiplication (MCM) is a popular approach for implemented fixed coefficient finite impulse response (FIR) filters. We propose two methods for truncating addition results in an MCM implementation that reduce the area required while decreasing latency. The effects of filter order and coefficient quantization are explored by the proposed search technique that reduces the computations required by an MCM implementation.

Two new adaptive filter implementation techniques based on distributed arithmetic (DA) are proposed that provide reduced area and speed without loss of filter performance. Adaptive filter implementations can also be based on real-time conversion of the adapted coefficients into a canonical-signed-digit (CSD) representation. We propose a new conversion circuit that reduces both latency and area. Fine-grained parallelism and relaxed look-ahead techniques are applied to develop a pipelined Gauss-Seidel fast affine projection (GSFAP) adaptive filter implementation that allow degradation to the adaptive filter performance and increases area to achieve significantly faster performance.

These proposed techniques for fixed coefficient and adaptive filters can be used for applications in which low area and high speed implementations are required.

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